SIST EN 61189-5-1:2016

SLOVENSKI STANDARD
SIST EN 61189-5-1:2016
01-december-2016
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Test methods for electrical materials, printed boards and other interconnection structures
and assemblies - Part 5-1: General test methods for materials and assemblies -
Guidance for printed board assemblies
Méthodes d'essai pour les matériaux électriques, les cartes imprimées et autres
structures d'interconnexion et ensembles - Partie 5-1: Méthodes d'essai générales pour
les matériaux et assemblages - Lignes directrices pour les assemblages de cartes à
circuit imprimé
Ta slovenski standard je istoveten z: EN 61189-5-1:2016
ICS:
31.180 7LVNDQDYH]MD7,9LQWLVNDQH Printed circuits and boards
SORãþH
31.190 Sestavljeni elektronski Electronic component
elementi assemblies
SIST EN 61189-5-1:2016 en
2003-01.Slovenski inštitut za standardizacijo. Razmnoževanje celote ali delov tega standarda ni dovoljeno.

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SIST EN 61189-5-1:2016

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SIST EN 61189-5-1:2016


EUROPEAN STANDARD EN 61189-5-1

NORME EUROPÉENNE

EUROPÄISCHE NORM
September 2016
ICS 31.180

English Version
Test methods for electrical materials, printed boards and other
interconnection structures and assemblies - Part 5-1: General
test methods for materials and assemblies - Guidance for printed
board assemblies
(IEC 61189-5-1:2016)
Méthodes d'essai pour les matériaux électriques, les cartes Prüfverfahren für Elektromaterialien, Leiterplatten und
imprimées et autres structures d'interconnexion et andere Verbindungsstrukturen und Baugruppen - Teil 5-1:
ensembles - Partie 5-1: Méthodes d'essai générales pour Allgemeine Prüfverfahren für Materialien und Baugruppen -
les matériaux et assemblages - Lignes directrices pour les Leitfaden für Baugruppen von Leiterplatten
assemblages de cartes à circuit imprimé (IEC 61189-5-1:2016)
(IEC 61189-5-1:2016)
This European Standard was approved by CENELEC on 2016-08-09. CENELEC members are bound to comply with the CEN/CENELEC
Internal Regulations which stipulate the conditions for giving this European Standard the status of a national standard without any alteration.
Up-to-date lists and bibliographical references concerning such national standards may be obtained on application to the CEN-CENELEC
Management Centre or to any CENELEC member.
This European Standard exists in three official versions (English, French, German). A version in any other language made by translation
under the responsibility of a CENELEC member into its own language and notified to the CEN-CENELEC Management Centre has the
same status as the official versions.
CENELEC members are the national electrotechnical committees of Austria, Belgium, Bulgaria, Croatia, Cyprus, the Czech Republic,
Denmark, Estonia, Finland, Former Yugoslav Republic of Macedonia, France, Germany, Greece, Hungary, Iceland, Ireland, Italy, Latvia,
Lithuania, Luxembourg, Malta, the Netherlands, Norway, Poland, Portugal, Romania, Slovakia, Slovenia, Spain, Sweden, Switzerland,
Turkey and the United Kingdom.


European Committee for Electrotechnical Standardization
Comité Européen de Normalisation Electrotechnique
Europäisches Komitee für Elektrotechnische Normung
CEN-CENELEC Management Centre: Avenue Marnix 17, B-1000 Brussels
© 2016 CENELEC All rights of exploitation in any form and by any means reserved worldwide for CENELEC Members.
 Ref. No. EN 61189-5-1:2016 E

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SIST EN 61189-5-1:2016
EN 61189-5-1:2016
European foreword
The text of document 91/1273/CDV, future edition 1 of IEC 61189-5-1, prepared by
IEC/TC 91 "Electronics assembly technology" was submitted to the IEC-CENELEC parallel vote and
approved by CENELEC as EN 61189-5-1:2016.

The following dates are fixed:
(dop) 2017-05-09
• latest date by which the document has to be
implemented at national level by
publication of an identical national
standard or by endorsement
• latest date by which the national (dow) 2019-08-09
standards conflicting with the
document have to be withdrawn

Attention is drawn to the possibility that some of the elements of this document may be the subject of
patent rights. CENELEC [and/or CEN] shall not be held responsible for identifying any or all such
patent rights.

Endorsement notice
The text of the International Standard IEC 61189-5-1:2016 was approved by CENELEC as a
European Standard without any modification.
In the official version, for Bibliography, the following notes have to be added for the standards
indicated:
IEC 60068 (series) NOTE Harmonized as EN 60068 (series).
IEC 60068-1:2013 NOTE Harmonized as EN 60068-1:2014.
IEC 60068-2-20 NOTE Harmonized as EN 60068-2-20.
IEC 60068-2-58:2015 NOTE Harmonized as EN 60068-2-58:2015.
IEC 61189-1 NOTE Harmonized as EN 61189-1.
IEC 61189-5 (series) NOTE Harmonized as EN 61189-5 (series).
IEC 61189-5 NOTE Harmonized as EN 61189-5.
IEC 61189-5-1:2016 NOTE Harmonized as EN 61189-5-1:2016.
IEC 61189-5-2:2015 NOTE Harmonized as EN 61189-5-2:2015.
IEC 61189-5-3:2015 NOTE Harmonized as EN 61189-5-3:2015.
IEC 61189-5-4:2015 NOTE Harmonized as EN 61189-5-4:2015.
IEC 61189-6 NOTE Harmonized as EN 61189-6.
IEC 61190-1-1 NOTE Harmonized as EN 61190-1-1.
IEC 61190-1-2 NOTE Harmonized as EN 61190-1-2.
IEC 61190-1-3 NOTE Harmonized as EN 61190-1-3.

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SIST EN 61189-5-1:2016
 EN 61189-5-1:2016
IEC 61249-2-7 NOTE Harmonized as EN 61249-2-7.
IEC 62137:2004 NOTE Harmonized as EN 62137:2004.
ISO 9001 NOTE Harmonized as EN ISO 9001.
ISO 9455-1 NOTE Harmonized as EN 29455-1.
ISO 9455-2 NOTE Harmonized as EN 29455-2.

3

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SIST EN 61189-5-1:2016

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SIST EN 61189-5-1:2016



IEC 61189-5-1

®


Edition 1.0 2016-07




INTERNATIONAL



STANDARD




NORME



INTERNATIONALE











Test methods for electrical materials, printed boards and other interconnection

structures and assemblies –

Part 5-1: General test methods for materials and assemblies – Guidance for


printed board assemblies



Méthodes d'essai pour les matériaux électriques, les cartes imprimées et autres


structures d'interconnexion et ensembles –

Partie 5-1: Méthodes d'essai générales pour les matériaux et les assemblages –

Lignes directrices pour les assemblages de cartes à circuit imprimé










INTERNATIONAL

ELECTROTECHNICAL

COMMISSION


COMMISSION

ELECTROTECHNIQUE


INTERNATIONALE




ICS 31.180 ISBN 978-2-8322-3506-5



Warning! Make sure that you obtained this publication from an authorized distributor.

Attention! Veuillez vous assurer que vous avez obtenu cette publication via un distributeur agréé.

® Registered trademark of the International Electrotechnical Commission
Marque déposée de la Commission Electrotechnique Internationale

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SIST EN 61189-5-1:2016
– 2 – IEC 61189-5-1:2016 © IEC 2016
CONTENTS
FOREWORD . 4
INTRODUCTION . 6
1 Scope . 8
2 Normative references. 8
3 Accuracy, precision and resolution . 8
3.1 General . 8
3.2 Accuracy . 8
3.3 Precision . 9
3.4 Resolution. 10
3.5 Report . 10
3.6 Student’s t distribution . 10
3.7 Suggested uncertainty limits . 11
4 Catalogue of approved test methods . 12
5 List of contents of the IEC 61189-5 series . 12
Annex A (informative) Tests . 13
Annex B (informative) Guidance documents and handbooks . 15
B.1 General . 15
B.2 Handbook and guide to supplement IPC-J-STD-001 . 15
B.3 Guidelines for Electrically Conductive Surface Mount Adhesives (IPC-3406) . 15
B.4 Users Guide for Cleanliness of Unpopulated Printed Boards (IPC-5701) . 15
B.5 Guidelines for OEM’s in Determining Acceptable Levels of Cleanliness of
Unpopulated Printed Boards (IPC-5702) . 15
B.6 Surface Insulation Resistance Handbook (IPC-9201) . 16
B.7 Material and Process Characterisation / Qualification Test Protocol for
Assessing Electrochemical Performance (IPC-9202) . 16
B.8 User Guide for the IPC/IEC B52 Process Qualification Test Vehicle
(IPC-9203) . 16
B.9 PWB Assembly Soldering Process Guideline for Electronic Components
(IPC-9502) . 16
B.10 Aqueous Post Solder Cleaning Handbook (IPC-AC-62A) . 17
B.11 Guidelines for Cleaning of Printed Boards and Assemblies (IPC-CH-65A) . 17
B.12 Handbook (IPC-J-STD-005) . 17
B.13 Acceptability of Electronic Assemblies (IPC-HDBK-610) . 18
B.14 Guidelines for Design, Selection and Application of Conformal Coatings
(IPC-HDBK-830) . 18
B.15 Solder mask Handbook (IPC-HDBK-840) . 18
B.16 Guidelines and Requirements for Electrical Testing of Unpopulated Printed
Boards (IPC-9252) . 19
B.17 In-Process DPMO and Estimated Yield for PCAs (IPC-9261A) . 19
B.18 Assembly Soldering Process Guideline for Electronic Components
(IPC-9502 PWB) . 20
B.19 Users Guide for IPC-TM-650, Method 2.6.27, Thermal Stress, Convection
Reflow Assembly Simulation (IPC-9631) . 20
B.20 High Temperature Printed Board Flatness Guideline (IPC-9641) . 20
B.21 User Guide for the IPC-TM-650, Method 2.6.25, Conductive Anodic Filament
(CAF) Resistance Test (Electrochemical Migration Testing) (IPC-9691A) . 21

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SIST EN 61189-5-1:2016
IEC 61189-5-1:2016 © IEC 2016 – 3 –
B.22 Mechanical Shock Test Guidelines for Solder Joint Reliability (IPC-JEDEC-
9703) . 21
B.23 Printed Circuit Assembly Strain Gage Test Guideline (IPC-JEDEC-9704A) . 22
Bibliography . 23

Table 1 – Student’s t distribution . 11
Table A.1 – General test methods for materials and assemblies . 13

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SIST EN 61189-5-1:2016
– 4 – IEC 61189-5-1:2016 © IEC 2016
INTERNATIONAL ELECTROTECHNICAL COMMISSION
____________

TEST METHODS FOR ELECTRICAL MATERIALS,
PRINTED BOARDS AND OTHER INTERCONNECTION
STRUCTURES AND ASSEMBLIES –

Part 5-1: General test methods for materials and assemblies –
Guidance for printed board assemblies

FOREWORD
1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising
all national electrotechnical committees (IEC National Committees). The object of IEC is to promote
international co-operation on all questions concerning standardization in the electrical and electronic fields. To
this end and in addition to other activities, IEC publishes International Standards, Technical Specifications,
Technical Reports, Publicly Available Specifications (PAS) and Guides (hereafter referred to as “IEC
Publication(s)”). Their preparation is entrusted to technical committees; any IEC National Committee interested
in the subject dealt with may participate in this preparatory work. International, governmental and non-
governmental organizations liaising with the IEC also participate in this preparation. IEC collaborates closely
with the International Organization for Standardization (ISO) in accordance with conditions determined by
agreement between the two organizations.
2) The formal decisions or agreements of IEC on technical matters express, as nearly as possible, an international
consensus of opinion on the relevant subjects since each technical committee has representation from all
interested IEC National Committees.
3) IEC Publications have the form of recommendations for international use and are accepted by IEC National
Committees in that sense. While all reasonable efforts are made to ensure that the technical content of IEC
Publications is accurate, IEC cannot be held responsible for the way in which they are used or for any
misinterpretation by any end user.
4) In order to promote international uniformity, IEC National Committees undertake to apply IEC Publications
transparently to the maximum extent possible in their national and regional publications. Any divergence
between any IEC Publication and the corresponding national or regional publication shall be clearly indicated in
the latter.
5) IEC itself does not provide any attestation of conformity. Independent certification bodies provide conformity
assessment services and, in some areas, access to IEC marks of conformity. IEC is not responsible for any
services carried out by independent certification bodies.
6) All users should ensure that they have the latest edition of this publication.
7) No liability shall attach to IEC or its directors, employees, servants or agents including individual experts and
members of its technical committees and IEC National Committees for any personal injury, property damage or
other damage of any nature whatsoever, whether direct or indirect, or for costs (including legal fees) and
expenses arising out of the publication, use of, or reliance upon, this IEC Publication or any other IEC
Publications.
8) Attention is drawn to the Normative references cited in this publication. Use of the referenced publications is
indispensable for the correct application of this publication.
9) Attention is drawn to the possibility that some of the elements of this IEC Publication may be the subject of
patent rights. IEC shall not be held responsible for identifying any or all such patent rights.
International Standard IEC 61189-5-1 has been prepared by IEC technical committee 91:
Electronics assembly technology.
The text of this standard is based on the following documents:
CDV Report on voting
91/1273/CDV 91/1354/RVC

Full information on the voting for the approval of this standard can be found in the report on
voting indicated in the above table.
This publication has been drafted in accordance with the ISO/IEC Directives, Part 2.

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SIST EN 61189-5-1:2016
IEC 61189-5-1:2016 © IEC 2016 – 5 –
A list of all parts in the IEC 61189 series, published under the general title Test methods for
electrical materials, printed boards and other interconnection structures and assemblies, can
be found on the IEC website.
The committee has decided that the contents of this publication will remain unchanged until
the stability date indicated on the IEC website under "http://webstore.iec.ch" in the data
related to the specific publication. At this date, the publication will be
• reconfirmed,
• withdrawn,
• replaced by a revised edition, or
• amended.

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SIST EN 61189-5-1:2016
– 6 – IEC 61189-5-1:2016 © IEC 2016
INTRODUCTION
IEC 61189 relates to test methods for printed boards and printed board assemblies, as well as
related materials or component robustness, irrespective of their method of manufacture.
The standard is divided into separate parts, covering information for the designer and the test
methodology engineer or technician. Each part has a specific focus. Methods are grouped
according to their application and numbered sequentially as they are developed and released.
In some instances test methods developed by other technical committees (for example, TC
104) have been reproduced from existing IEC standards in order to provide the reader with a
comprehensive set of test methods. When this situation occurs, it will be noted on the specific
test method. If the test method is reproduced with minor revisions, those paragraphs that are
different are identified.
This part of IEC 61189 contains test methods for evaluating printed board assemblies as well
as materials used in the manufacture of electronic assemblies. The methods are self-
contained, with sufficient detail and description so as to achieve uniformity and reproducibility
in the procedures and test methodologies.
It was decided by TC 91 that the contents of IEC 61189-5 and IEC 61189-6 be merged into a
series of documents in the following way:
IEC 61189-5-1, Test methods for electrical materials, printed boards and other
interconnection structures and assemblies – Part 5-1: General test methods for materials and
assemblies – Guidance for printed board assemblies
IEC 61189-5-2:2015, Test methods for electrical materials, printed boards and other
interconnection structures and assemblies – Part 5-2: General test methods for materials and
assemblies – Soldering flux for printed board assemblies
IEC 61189-5-3:2015, Test methods for electrical materials, printed boards and other
interconnection structures and assemblies – Part 5-3: General test methods for materials and
assemblies – Soldering paste for printed board assemblies
IEC 61189-5-4:2015, Test methods for electrical materials, printed boards and other
interconnection structures and assemblies – Part 5-4: General test methods for materials and
assemblies – Solder alloys and fluxed and non-fluxed solid wire for printed board assemblies
IEC 61189-5-501:—, Test methods for electrical materials, printed boards and other
interconnection structures and assemblies – Part 5-501: General test methods for materials
1
and assemblies – Surface insulation resistance (SIR) testing of solder fluxes
IEC 61189-5-502:—, Test methods for electrical materials, printed boards and other
interconnection structures and assemblies – Part 5-502: General test methods for materials
1
and assemblies – SIR testing of assemblies
IEC 61189-5-503:—, Test methods for electrical materials, printed boards and other
interconnection structures and assemblies – Part 5-503: General test methods for materials
1
and assemblies – Conductive Anodic Filaments (CAF) testing of circuit boards
IEC 61189-5-504:—, Test methods for electrical materials, printed boards and other
interconnection structures and assemblies – Part 5-504: General test methods for materials
1

and assemblies – Process ionic contamination testing
____________
1
 Under consideration.

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SIST EN 61189-5-1:2016
IEC 61189-5-1:2016 © IEC 2016 – 7 –
The tests shown in this standard are grouped according to the following principles:
P: preparation/conditioning methods
V: visual test methods
D: dimensional test methods
C: chemical test methods
M: mechanical test methods
E: electrical test methods
N: environmental test methods
X: miscellaneous test methods including process control tests for the assembly process
To facilitate reference to the tests, to retain consistency of presentation and to provide for
future expansion, each test is identified by a number (assigned sequentially) added to the
prefix (group code) letter showing the group to which the test method belongs.
The test method numbers have no significance with respect to an eventual test sequence.
This responsibility rests with the relevant specification that calls for the method being
performed. The relevant specification, in most instances, also describes pass/fail criteria.
The letter and number combinations are for reference purposes to be used by the relevant
specification. Thus, "5-2C01" represents the first chemical test method described in
IEC 61189-5-2.
In short, in this example, 5-2 is the number of the part of IEC 61189, C is the group of
methods, and 01 is the test number.
A list of all test methods included in the above-mentioned documents, is given in Annex A.
This annex will be reissued whenever new tests are introduced.

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SIST EN 61189-5-1:2016
– 8 – IEC 61189-5-1:2016 © IEC 2016
TEST METHODS FOR ELECTRICAL MATERIALS,
PRINTED BOARDS AND OTHER INTERCONNECTION
STRUCTURES AND ASSEMBLIES –

Part 5-1: General test methods for materials and assemblies –
Guidance for printed board assemblies



1 Scope
This part of IEC 61189 is a catalogue of test methods representing methodologies and
procedures that can be applied to test printed board assemblies.
This part of IEC 61189 contains the types of content of the IEC 61189-5 series, as well as
guidance documents and handbooks for printed board assemblies.
2 Normative references
The following documents are referred to in the text in such a way that some or all of their
content constitutes requirements of this document. For dated references, only the edition
cited applies. For undated references, the latest edition of the referenced document (including
any amendments) applies.
There are no normative references in this document.
3 Accuracy, precision and resolution
3.1 General
Measurement errors and uncertainties are inherent in all measurement processes. The
information given below enables valid estimates of the amount of error and uncertainty to be
taken into account.
Test data serve a number of purposes which include
• monitoring of a process;
• enhancing of confidence in quality conformance;
• arbitration between customer and supplier.
In any of these circumstances, it is essential that confidence can be placed upon the test data
in terms of
• accuracy: calibration of the test instruments and/or system;
• precision: the repeatability and uncertainty of the measurement;
• resolution: the suitability of the test instrument and/or system.
3.2 Accuracy
The regime by which routine calibration of the test equipment is undertaken shall be clearly
stated in the quality documentation of the supplier or agency conducting the test and shall
meet the requirements of ISO 9001 or equivalent (see Bibliography).

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SIST EN 61189-5-1:2016
IEC 61189-5-1:2016 © IEC 2016 – 9 –
The calibration shall be conducted by an agency having accreditation to a national or
international measurement standards institute. There should be an uninterrupted chain of
calibration to a national or international standard.
Where calibration to a national or international standard is not possible, round-robin
techniques may be used and documented to enhance confidence in measurement accuracy.
The calibration interval shall normally be one year. Equipment consistently found to be
outside acceptable limits of accuracy shall be subject to shortened calibration intervals.
Equipment consistently found to be well within acceptable limits may be subject to relaxed
calibration intervals.
A record of the calibration and maintenance history shall be maintained for each instrument.
These records should state the uncertainty of the calibration technique (in ±% deviation) in
order that uncertainties of measurement can be aggregated and determined.
A procedure shall be implemented to resolve any situation where an instrument is found to be
outside calibration limits.
3.3 Precision
The uncertainty budget of any measurement technique is made up of both systematic and
random uncertainties. All estimates shall be based upon a single confidence level, the
minimum being 95 %.
Systematic uncertainties are usually the predominant contributor and will include all
uncertainties not subject to random fluctuation. These include
• calibration uncertainties;
• errors due to the use of an instrument under conditions which differ from those under
which it was calibrated;
• errors in the graduation of a scale of an analogue meter (scale shape error).
Random uncertainties result from numerous sources but can be deduced from repeated
measurement of a standard item. Therefore, it is not necessary to isolate the individual
contributions. These may include
• random fluctuations such as those due to the variation of an influence parameter.
Typically, changes in atmospheric conditions reduce the repeatability of a measurement;
• uncertainty in discrimination, such as setting a pointer to a fiducial mark or interpolating
between graduations on an analogue scale.
Aggregation of uncertainties: Geometric addition (root-sum-square) of uncertainties may be
used in most cases. An interpolation error is normally added separately and may be accepted
as being 20 % of the difference between the finest graduations of the scale of the instrument.
2 2
U = ± (U + U ) + U
t s r i

where
U is the total uncertainty;
t
U is the systematic uncertainty;
s
U is the random uncertainty;
r
U is the interpolation error.
i

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SIST EN 61189-5-1:2016
– 10 – IEC 61189-5-1:2016 © IEC 2016
Determination of random uncertainties: Random uncertainty can be determined by repeated
measurement of a parameter and subsequent statistical manipulation of the measured data.
The technique assumes that the data exhibits a normal (Gaussian) distribution.
t × σ
U =
r
n

where
U is the random uncertainty;
r
n is the sample size;
t is the percentage point of the t distribution as shown in Table 1;
σ is the standard deviation (σ ).
n–1
3.4 Resolution
It is paramount that the test equipment used is capable of sufficient resolution. Measurement
systems used should be capable of resolving 10 % (or better) of the test limit tolerance.
It is accepted that some technologies will place a physical limitation upon resolution (for
example, optical resolution).
3.5 Report
In addition to requirements detailed in the test specification, the report shall detail
a) the test method used;
b) the identity of the sample(s);
c) the test instrumentation;
d) the specified limit(s);
e) an estimate of measurement uncertainty and resultant working limit(s) for the test;
f) the detailed test results;
g) the test date and operators’ signature.
3.6 Student’s t distribution
Table 1 gives values of the factor t for 95 % and 99 % confidence levels, as a function of the
number of measurements.

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SIST EN 61189-5-1:2016
IEC 61189-5-1:2016 © IEC 2016 – 11 –
Table 1 – Student’s t distribution
Sample t value t value Sample t value t value
size 95 % 99 % size 95 % 99 %
2 12,7 63,7 14 2,16 3,01
3 4,3 9,92 15 2,14 2,98
4 3,18 5,84 16 2,13 2,95
5 2,78 4,6 17 2,12 2,92
6 2,57 4,03 18 2,11 2,9
7 2,45 3,71 19 2,1 2,88
8 2,36 3,5 20 2,09 2,86
9 2,31 3,36 21 2,08 2,83
10 2,26 3,25 22 2,075 2,82
11 2,23 3,17 23 2,07 2,81
12 2,2 3,11 24 2,065 2,8
13 2,18 3,05 25 2,06 2,79

3.7 Suggested uncertainty limits
The following target uncertainties are suggested:
a) Voltage < 1 kV: ± 1,5 %
b) Voltage > 1 kV: ± 2,5 %
c) Current < 20 A: ± 1,5 %
d) Current > 20 A: ± 2,5 %
Resistance
e) Earth and continuity: ± 10 %
f) Insulation: ± 10 %
g) Frequency: ± 0,2 %
Time
h) Interval < 60 s: ± 1 s
i) Interval > 60 s: ± 2 %
j) Mass <
...