SIST EN 61191-6:2010

SLOVENSKI STANDARD
SIST EN 61191-6:2010
01-september-2010
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Printed board assemblies - Part 6: Evaluation criteria for voids in soldered joints of BGA
and LGA and measurement method (IEC 61191-6:2010)
Elektronikaufbauten auf Leiterplatten - Teil 6: Bewertungskriterien für Hohlräume in
Lötverbindungen von BGA und LGA und Messmethode (IEC 61191-6:2010)
Ensembles de cartes imprimées - Partie 6: Critères d’évaluation des vides dans les joints
brasés des boîtiers BGA et LGA et méthode de mesure (CEI 61191-6:2010)
Ta slovenski standard je istoveten z: EN 61191-6:2010
ICS:
31.180 7LVNDQDYH]MD7,9LQWLVNDQH Printed circuits and boards
SORãþH
SIST EN 61191-6:2010 en
2003-01.Slovenski inštitut za standardizacijo. Razmnoževanje celote ali delov tega standarda ni dovoljeno.

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SIST EN 61191-6:2010

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SIST EN 61191-6:2010

EUROPEAN STANDARD
EN 61191-6

NORME EUROPÉENNE
April 2010
EUROPÄISCHE NORM

ICS 31.180


English version


Printed board assemblies -
Part 6: Evaluation criteria for voids in soldered joints of BGA and LGA
and measurement method
(IEC 61191-6:2010)


Ensembles de cartes imprimées -  Elektronikaufbauten auf Leiterplatten -
Partie 6: Critères d’évaluation des vides Teil 6: Bewertungskriterien für Hohlräume
dans les joints brasés des boîtiers BGA in Lötverbindungen von BGA und LGA
et LGA et méthode de mesure und Messmethode
(CEI 61191-6:2010) (IEC 61191-6:2010)




This European Standard was approved by CENELEC on 2010-04-01. CENELEC members are bound to comply
with the CEN/CENELEC Internal Regulations which stipulate the conditions for giving this European Standard
the status of a national standard without any alteration.

Up-to-date lists and bibliographical references concerning such national standards may be obtained on
application to the Central Secretariat or to any CENELEC member.

This European Standard exists in three official versions (English, French, German). A version in any other
language made by translation under the responsibility of a CENELEC member into its own language and notified
to the Central Secretariat has the same status as the official versions.

CENELEC members are the national electrotechnical committees of Austria, Belgium, Bulgaria, Croatia, Cyprus,
the Czech Republic, Denmark, Estonia, Finland, France, Germany, Greece, Hungary, Iceland, Ireland, Italy,
Latvia, Lithuania, Luxembourg, Malta, the Netherlands, Norway, Poland, Portugal, Romania, Slovakia, Slovenia,
Spain, Sweden, Switzerland and the United Kingdom.

CENELEC
European Committee for Electrotechnical Standardization
Comité Européen de Normalisation Electrotechnique
Europäisches Komitee für Elektrotechnische Normung

Management Centre: Avenue Marnix 17, B - 1000 Brussels


© 2010 CENELEC - All rights of exploitation in any form and by any means reserved worldwide for CENELEC members.
Ref. No. EN 61191-6:2010 E

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SIST EN 61191-6:2010
EN 61191-6:2010 - 2 -
Foreword
The text of document 91/897/FDIS, future edition 1 of IEC 61191-6, prepared by IEC TC 91, Electronics
assembly technology, was submitted to the IEC-CENELEC parallel vote and was approved by CENELEC
as EN 61191-6 on 2010-04-01.
Attention is drawn to the possibility that some of the elements of this document may be the subject of
patent rights. CEN and CENELEC shall not be held responsible for identifying any or all such patent
rights.
The following dates were fixed:
– latest date by which the EN has to be implemented
at national level by publication of an identical
(dop) 2011-01-01
national standard or by endorsement
– latest date by which the national standards conflicting
(dow) 2013-04-01
with the EN have to be withdrawn
Annex ZA has been added by CENELEC.
__________
Endorsement notice
The text of the International Standard IEC 61191-6:2010 was approved by CENELEC as a European
Standard without any modification.
In the official version, for Bibliography, the following notes have to be added for the standards indicated:
IEC 61190-1-3:2007 NOTE  Harmonized as EN 61190-1-3:2007 (not modified).
IEC 61191-1 NOTE  Harmonized as EN 61191-1
__________

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SIST EN 61191-6:2010
- 3 - EN 61191-6:2010
Annex ZA
(normative)

Normative references to international publications
with their corresponding European publications

The following referenced documents are indispensable for the application of this document. For dated
references, only the edition cited applies. For undated references, the latest edition of the referenced
document (including any amendments) applies.

NOTE  When an international publication has been modified by common modifications, indicated by (mod), the relevant EN/HD
applies.

Publication Year Title EN/HD Year

1)
IEC 60068-1 1988 Environmental testing - EN 60068-1 1994

+ A1 1992 Part 1: General and guidance - -


IEC 60194 2006 Printed board design, manufacture EN 60194 2006
and assembly - Terms and definitions









1)
EN 60068-1 includes A1 to IEC 60068-1 + corr. October .

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SIST EN 61191-6:2010

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SIST EN 61191-6:2010

IEC 61191-6
®
Edition 1.0 2010-01
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
colour
inside


Printed board assemblies –
Part 6: Evaluation criteria for voids in soldered joints of BGA and LGA and
measurement method

Ensembles de cartes imprimées –
Partie 6: Critères d’évaluation des vides dans les joints brasés des boîtiers BGA
et LGA et méthode de mesure

INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
COMMISSION
ELECTROTECHNIQUE
PRICE CODE
INTERNATIONALE
W
CODE PRIX
ICS 31.180 ISBN 2-8318-1076-3
® Registered trademark of the International Electrotechnical Commission
Marque déposée de la Commission Electrotechnique Internationale

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SIST EN 61191-6:2010
– 2 – 61191-6 © IEC:2010
CONTENTS
FOREWORD.4
INTRODUCTION.6
1 Scope.7
2 Normative references .7
3 Terms and definitions .7
4 Voids in solder joints .8
4.1 General .8
4.2 Sources of voids.8
4.3 Impact of voids .9
4.4 Void detection .9
4.5 Void classification .9
5 Measurement .10
5.1 X-ray transmission equipment .10
5.2 Measuring environment .10
5.3 Measurement procedure.10
5.4 Record of the measured value.11
5.5 Considerations on measurement .11
5.5.1 X-ray intensity for void detection.11
5.5.2 Detection of real edge .11
5.5.3 Verification of measurement results.11
6 Void occupancy .11
6.1 Calculation of void occupancy .11
6.2 Void occupancy for multiple voids.14
7 Evaluation .14
7.1 Soldered joints to be evaluated .14
7.2 Evaluation of thermal life cycle decreased due to voids .14
7.3 Evaluation criteria for voids .15
Annex A (informative) Experimental results and simulation of voids and decrease of
life due to thermal stress.16
Annex B (informative) X-ray transmission equipment .20
Annex C (informative) Voids in BGA solder ball .22
Annex D (informative) Measurement using X-ray transmission imaging.34
Bibliography.38

Figure 1 – Void occupancy.13
Figure 2 – Voids in a soldered joint.15
Figure A.1 – BGA soldered joint, Sn-Ag-Cu.17
Figure A.2 – BGA soldered joint, Sn-Zn .17
Figure A.3 – LGA soldered joint .18
Figure B.1 – Construction of the equipment .20
Figure C.1 – Small voids clustered in mass at the ball-to-land interface .26
Figure C.2 – X-ray image of solder balls with voids.27
Figure C.3 – Example of voided area at land and board interface .27
Figure C.4 – Voids in BGAs with crack started at corner lead.31

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SIST EN 61191-6:2010
61191-6 © IEC:2010 – 3 –
Figure D.1 – X-ray transmission imaging.35
Figure D.2 – X-ray transmission imaging of solder joint.36
Figure D.3 – Typical X-ray transmission images of solder joint.36

Table 1 – Void classification .9
Table 2 – Examples of Cross-section of joint and void occupancy.14
Table A.1 – Fatigue life reduced by voids in soldered joint of BGA.17
Table A.2 – Fatigue life reduced by voids in soldered joint of LGA .18
Table A.3 – Voids evaluation criteria for soldered joints of BGA.19
Table A.4 – Voids evaluation criteria for soldered joints of LGA .19
Table C.1 – Void classification .27
Table C.2 – Corrective action indicator for lands used with 1,5 mm, 1,27 mm or
1,0 mm pitch .28
Table C.3 – Corrective action indicator for lands used with 0,8 mm, 0,65 mm or 0,5 mm
pitch .30
Table C.4 – Corrective action indicator for micro-via in-pad lands used with 0,5 mm,
0,4 mm or 0,3 mm pitch .32
Table C.5 – Ball-to-void size image comparison for common ball contact diameters .33
Table C.6 – C = 0 sampling plan (sample size for specific index value).33

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SIST EN 61191-6:2010
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INTERNATIONAL ELECTROTECHNICAL COMMISSION
____________

PRINTED BOARD ASSEMBLIES –

Part 6: Evaluation criteria for voids in soldered joints of BGA
and LGA and measurement method


FOREWORD
1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising
all national electrotechnical committees (IEC National Committees). The object of IEC is to promote
international co-operation on all questions concerning standardization in the electrical and electronic fields. To
this end and in addition to other activities, IEC publishes International Standards, Technical Specifications,
Technical Reports, Publicly Available Specifications (PAS) and Guides (hereafter referred to as “IEC
Publication(s)”). Their preparation is entrusted to technical committees; any IEC National Committee interested
in the subject dealt with may participate in this preparatory work. International, governmental and non-
governmental organizations liaising with the IEC also participate in this preparation. IEC collaborates closely
with the International Organization for Standardization (ISO) in accordance with conditions determined by
agreement between the two organizations.
2) The formal decisions or agreements of IEC on technical matters express, as nearly as possible, an international
consensus of opinion on the relevant subjects since each technical committee has representation from all
interested IEC National Committees.
3) IEC Publications have the form of recommendations for international use and are accepted by IEC National
Committees in that sense. While all reasonable efforts are made to ensure that the technical content of IEC
Publications is accurate, IEC cannot be held responsible for the way in which they are used or for any
misinterpretation by any end user.
4) In order to promote international uniformity, IEC National Committees undertake to apply IEC Publications
transparently to the maximum extent possible in their national and regional publications. Any divergence
between any IEC Publication and the corresponding national or regional publication shall be clearly indicated in
the latter.
5) IEC itself does not provide any attestation of conformity. Independent certification bodies provide conformity
assessment services and, in some areas, access to IEC marks of conformity. IEC is not responsible for any
services carried out by independent certification bodies.
6) All users should ensure that they have the latest edition of this publication.
7) No liability shall attach to IEC or its directors, employees, servants or agents including individual experts and
members of its technical committees and IEC National Committees for any personal injury, property damage or
other damage of any nature whatsoever, whether direct or indirect, or for costs (including legal fees) and
expenses arising out of the publication, use of, or reliance upon, this IEC Publication or any other IEC
Publications.
8) Attention is drawn to the Normative references cited in this publication. Use of the referenced publications is
indispensable for the correct application of this publication.
9) Attention is drawn to the possibility that some of the elements of this IEC Publication may be the subject of
patent rights. IEC shall not be held responsible for identifying any or all such patent rights.
International Standard IEC 61191-6 has been prepared by IEC technical committee 91:
Electronics assembly technology.
The text of this standard is based on the following documents:
FDIS Report on voting
91/897/FDIS 91/909/RVD

Full information on the voting for the approval of this standard can be found in the report on
voting indicated in the above table.
This publication has been drafted in accordance with the ISO/IEC Directives, Part 2.
A list of all parts of the IEC 61191 series, under the general title Printed board assemblies,
can be found on the IEC website.

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SIST EN 61191-6:2010
61191-6 © IEC:2010 – 5 –
The committee has decided that the contents of this publication will remain unchanged until
the maintenance result date indicated on the IEC web site under "http://webstore.iec.ch" in
the data related to the specific publication. At this date, the publication will be
• reconfirmed,
• withdrawn,
• replaced by a revised edition, or
• amended.

IMPORTANT – The 'colour inside' logo on the cover page of this publication indicates
that it contains colours which are considered to be useful for the correct
understanding of its contents. Users should therefore print this document using a
colour printer.

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SIST EN 61191-6:2010
– 6 – 61191-6 © IEC:2010
INTRODUCTION
The necessity for the evaluation of voids in soldered joints increases in the industry because
the voids may affect the reliability of joints as the devices get smaller. As the number of
interconnections increases the reliability per joint must also increase.
This subject has been discussed in some countries and trade organizations, and specific
proposals have been made for classification or evaluation of voids to develop process
guidelines. The same subject is also studied in academia to find correlation between voids
and reliability of a joint. Appreciable findings are now available from the reliability study
including relation between shapes of voids and degradation of life due to voids in a joint in
thermal cycle stress.
Based on the information available, we developed evaluation criteria of voids in soldered
joints for BGA (Ball Grid Array) and LGA (Land Grid Array) and a measurement method.

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SIST EN 61191-6:2010
61191-6 © IEC:2010 – 7 –
PRINTED BOARD ASSEMBLIES –

Part 6: Evaluation criteria for voids in soldered joints of BGA
and LGA and measurement method



1 Scope
This part of IEC 61191 specifies the evaluation criteria for voids on the scale of the thermal
cycle life, and the measurement method of voids using X-ray observation. This part of
IEC 61191 is applicable to the voids generated in the solder joints of BGA and LGA soldered
on a board. This part of IEC 61191 is not applicable to the BGA package itself before it is
assembled on a board.
This standard is applicable also to devices having joints made by melt and re-solidification,
such as flip chip devices and multi-chip modules, in addition to BGA and LGA. This standard
is not applicable to joints with under-fill between a device and a board, or to solder joints
within a device package.
This standard is applicable to macrovoids of the sizes of from 10 µm to several hundred
micrometres generated in a soldered joint, but is not applicable to smaller voids (typically,
planar microvoids) with a size of smaller than 10 µm in diameter.
This standard is intended for evaluation purposes and is applicable to
− research studies,
− off-line production process control and
− reliability assessment of assembly
2 Normative references
The following referenced documents are indispensable for the application of this document.
For dated references, only the edition cited applies. For undated references, the latest edition
of the referenced document (including any amendments) applies.
IEC 60068-1:1998, Environmental testing – Part 1: General and guidance
Amendment 1:1992
IEC 60194:2006, Printed board design, manufacture and assembly – Terms and definitions
3 Terms and definitions
For the purposes of this document, the terms and definitions given in IEC 60194 and the
following apply. The terms and definitions for BGA and LGA have been added for the benefit
of the reader, see also IEC 60194.
3.1
ball grid array
BGA
surface mount package wherein the bumps for terminations are formed in a grid on the bottom
of a package
[IEC 60194, definition 34.1096]

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SIST EN 61191-6:2010
– 8 – 61191-6 © IEC:2010
3.2
land grid array
LGA
surface mount package with termination lands located in a grid pattern on the bottom of the
package
[IEC 60194, definition 33.1891, modified]
3.3
void occupancy
ratio of the void cross-section area in a joint to the maximum cross-section area of the joint
NOTE Practical calculation for a void evaluation is specified in 6.1.
3.4
macrovoid
the most widely occurring voids in solder joints; these are caused by volatile compounds that
evolve during the soldering processes, and they are typically larger than 10 μm in diameter
3.5
planar microvoids
series of small voids located at the interface between the PCB (Printed Circuit Board) lands
and the solder; they are caused by the surface condition of the board
4 Voids in solder joints
4.1 General
A change in void size or frequency of voids may be an indication that the manufacturing
parameters need to be adjusted. Two reported causes of voids are trapped flux that has not
had enough time to be released from the solder paste, and contaminants on improperly
cleaned circuit boards. Voids appear as a lighter area inside the X-ray picture of solder joints
and are usually found randomly throughout the package.
4.2 Sources of voids
There can be voids in a BGA solder ball, in the solder joint to LSI (Large-Scale Integration)
package interface, or in the solder joint to PCB interface. Various sources or reasons can be
responsible for these voids. Voids can be carried over from original voids in BGA solder balls,
which could be the result of the ball manufacturing process. Voids can be induced into the
reflowed solder joint by either the voids in the original component solder ball, or during the
reflow attachment process. Voids can also form near the PCB interface during attachment.
These voids are typically formed during the reflow soldering process by flux volatiles trapped
during the solidification of the molten solder. The source of flux volatiles can be either from
applied flux itself (typically rework), or flux which is one of the constituents of the solder paste
used in the reflow assembly process.
In addition to voids formed from via-in-pad construction, some voids are detected in the
middle to top (ball/device interface) of the reflowed solder joint. This is expected because the
trapped air bubble and the vaporized flux, which is applied to the PCB lands, rises during the
reflow profile. This occurs when the applied solder paste and the BGA’s collapsible solder
balls melt together during the reflow profile. If the reflow profile cycle doesn’t allow sufficient
time for either the trapped air or vaporized flux to escape, a void is formed as the molten
solder solidifies in the cool down area of the reflow profile. Therefore, the development of the
reflow profile is extremely important as a contributor to the formation of voids.
Voiding can also be a result of surface contamination at the component land or at the PCB
land, inter-metallics forming between solder ball and land, or un-expelled flux residues from
the assembly process.

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SIST EN 61191-6:2010
61191-6 © IEC:2010 – 9 –
4.3 Impact of voids
How many and what size of voids should be allowable in the product before they impact the
product’s required reliability? Voids may impact reliability by weakening the solder balls and
reducing functionality because the reduced cross-section will have lower heat transfer and
current carrying capabilities. Large voids are more detrimental but small pre-existing voids
can merge during reflow to create larger voids. The elimination of voids, or at least a
substantial reduction, is generally preferred.
4.4 Void detection
X-ray is required for the detection of voids in BGA and LGA solder joints. Higher cost
equipment is based on X-ray tomography or laminography. Both types of these systems
provide valuable techniques for void detection and location.
X-ray systems tend to distort the size of voids depending on measuring conditions and the
capability of the X-ray system used. It is possible to accurately measure the true volume of a
void but the procedure can be involved and requires a known reference for radiometric
calibration of the X-ray film or detector. In most cases the effort is better spent on identifying
and eliminating the cause of the voids.
4.5 Void classification
In order to assess different conditions, voids have been given a specific identifier, based on
location, to establish a method of void identification and the possibility of corrective action for
process improvement. The details are provided in Table 1 which shows the classification
criteria for the location of voids in the BGA solder ball structure.
The following descriptions identify the three different void types.
Type C: Void(s) within the ball after the board level assembly process.
Type D: Void(s) at the ball/package substrate interface after the board level assembly process.
Type E: Void(s) at the ball/board substrate interface after the board level assembly process.
This standard specifies evaluation criteria for voids in soldered joints and the reliability of the
joints of devices assembled on a board. This standard is not applicable to the voids in the
BGA package as received (refer to type A and type B in Table C.1), because any correlation
between voids as received and voids after assembling has not been confirmed yet.
Table 1 – Void classification
Type C Type D Type E
Void within the joint Void at the package Void at the board
interface interface
Package side Package side Package side
Void in BGA
soldered joint
Board side Board side Board side
Package side
Package side Package side
Void in LGA
soldered joint
Board side
Board side
Board side

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SIST EN 61191-6:2010
– 10 – 61191-6 © IEC:2010
5 Measurement
5.1 X-ray transmission equipment
Micro-focus X-ray transmission equipment is such that it can observe a BGA or LGA mounted
on a board from above or below the board. X-ray computer tomography (CT) equipment may
also be used, if necessary.
The test equipment should have the following specification and performance. An example of
the specification of available equipment is described in Annex B.
a) Maximum voltage: not less than 120 kV
b) Feature recognition size of X-ray: typically 2 µm
c) Maximum geometric magnification: more than 100×
Commonly available transmission X-ray systems can vary in the grayscale sensitivity that they
provide in the image which, in turn, can have an effect on the precision of the area calculation.
It should be noted that systems with lower grayscale sensitivity may cause the void(s) to
appear at a reduced size (and hence at a lower value) within the solder joint, as there is
insufficient sensitivity to observe the true edges of the spherical void, and the smallest voids
may not be visible at all. It is suggested that an X-ray system used for this standard has
sufficient capability to be able to see a 20 µm diameter void (for a 6 layer double sided board).
5.2 Measuring environment
Unless otherwise specified, measurements should be made in the standard atmospheric
condition, as specified in IEC 60068-1, after keeping the specimen in the condition for an
appropriate period.
NOTE The standard condition is the following.
Temperature: 15 °C to 35 °C
Relative humidity 25 % to 75 %
Atmospheric pressure 86 kPa to 106 kPa.
5.3 Measurement procedure
The following procedure is recommended for reference measurement of joint size and void
size, using X-ray transmission equipment with area calculation function. Different procedures
may be applied for higher throughput with minimum accuracy required.
a) Detect an image of solder joints and identify the solder joints with voids to be measured.
Multiple joints may be detected in a screen for higher throughput.
b) Deter
...