SIST EN 62386-101:2015

SLOVENSKI STANDARD
SIST EN 62386-101:2015
01-junij-2015
1DGRPHãþD
SIST EN 62386-101:2009
Digitalni naslovljivi vmesnik za razsvetljavo - 101. del: Splošne zahteve -
Sistemske komponente (IEC 62386-101:2014)
Digital addressable lighting interface - Part 101: General requirements - System
Components
Ta slovenski standard je istoveten z: EN 62386-101:2014
ICS:
29.140.50 Instalacijski sistemi za Lighting installation systems
razsvetljavo
35.200 Vmesniška in povezovalna Interface and interconnection
oprema equipment
SIST EN 62386-101:2015 en
2003-01.Slovenski inštitut za standardizacijo. Razmnoževanje celote ali delov tega standarda ni dovoljeno.

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SIST EN 62386-101:2015

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SIST EN 62386-101:2015


EUROPEAN STANDARD EN 62386-101

NORME EUROPÉENNE

EUROPÄISCHE NORM
December 2014
ICS 29.140; 29.140.50 Supersedes EN 62386-101:2009
English Version
Digital addressable lighting interface -
Part 101: General requirements - System components
(IEC 62386-101:2014)
Interface d'éclairage adressable numérique -  Digital adressierbare Schnittstelle für die Beleuchtung -
Partie 101: Exigences générales - Composants de système Teil 101: Allgemeine Anforderungen - Systemkomponenten
(CEI 62386-101:2014) (IEC 62386-101:2014)
This European Standard was approved by CENELEC on 2014-12-12. CENELEC members are bound to comply with the CEN/CENELEC
Internal Regulations which stipulate the conditions for giving this European Standard the status of a national standard without any alteration.
Up-to-date lists and bibliographical references concerning such national standards may be obtained on application to the CEN-CENELEC
Management Centre or to any CENELEC member.
This European Standard exists in three official versions (English, French, German). A version in any other language made by translation
under the responsibility of a CENELEC member into its own language and notified to the CEN-CENELEC Management Centre has the
same status as the official versions.
CENELEC members are the national electrotechnical committees of Austria, Belgium, Bulgaria, Croatia, Cyprus, the Czech Republic,
Denmark, Estonia, Finland, Former Yugoslav Republic of Macedonia, France, Germany, Greece, Hungary, Iceland, Ireland, Italy, Latvia,
Lithuania, Luxembourg, Malta, the Netherlands, Norway, Poland, Portugal, Romania, Slovakia, Slovenia, Spain, Sweden, Switzerland,
Turkey and the United Kingdom.


European Committee for Electrotechnical Standardization
Comité Européen de Normalisation Electrotechnique
Europäisches Komitee für Elektrotechnische Normung
CEN-CENELEC Management Centre: Avenue Marnix 17, B-1000 Brussels
© 2014 CENELEC All rights of exploitation in any form and by any means reserved worldwide for CENELEC Members.
 Ref. No. EN 62386-101:2014 E

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SIST EN 62386-101:2015
EN 62386-101:2014 - 2 -
Foreword
The text of document 34C/1098/FDIS, future edition 2 of IEC 62386-101, prepared by
SC 34C "Auxiliaries for lamps" of IEC/TC 34 "Lamps and related equipment" was submitted to the
IEC-CENELEC parallel vote and approved by CENELEC as EN 62386-101:2014.

The following dates are fixed:
(dop) 2015-09-12
• latest date by which the document has to be
implemented at national level by
publication of an identical national
standard or by endorsement
• latest date by which the national (dow) 2017-12-12
standards conflicting with the
document have to be withdrawn

This document supersedes EN 62386-101:2009.

Attention is drawn to the possibility that some of the elements of this document may be the subject of
patent rights. CENELEC [and/or CEN] shall not be held responsible for identifying any or all such
patent rights.

Endorsement notice
The text of the International Standard IEC 62386-101:2014 was approved by CENELEC as a
European Standard without any modification.
In the official version, for Bibliography, the following notes have to be added for the standards indicated:

CISPR 15 NOTE Harmonized as EN 55015.
IEC 61547 NOTE Harmonized as EN 61547.
1)
ISO/IEC 7498-1 NOTE Harmonized as EN ISO/IEC 7498-1 .

1)
Withdrawn publication.

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SIST EN 62386-101:2015
- 3 - EN 62386-101:2014
Annex ZA
(normative)

Normative references to international publications
with their corresponding European publications

The following documents, in whole or in part, are normatively referenced in this document and are
indispensable for its application. For dated references, only the edition cited applies. For undated
references, the latest edition of the referenced document (including any amendments) applies.

NOTE 1 When an International Publication has been modified by common modifications, indicated by (mod), the relevant
EN/HD applies.

NOTE 2 Up-to-date information on the latest versions of the European Standards listed in this annex is available here:
www.cenelec.eu

Publication Year Title EN/HD Year

IEC 61347 Series Lamp controlgear EN 61347 Series
IEC 61347-1 -  Lamp controlgear - EN 61347-1 -
Part 1: General and safety requirements
IEC 62386-102 2014 Digital addressable lighting interface - EN 62386-102 2014
Part 102: General requirements - Control
gear
IEC 62386-103 2014 Digital addressable lighting interface - EN 62386-103 2014
Part 103: General requirements - Control
devices
IEC 61000-4-11 -  Electromagnetic compatibility (EMC) - EN 61000-4-11 -
Part 4-11: Testing and measurement
techniques - Voltage dips, short
interruptions and voltage variations
immunity tests

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SIST EN 62386-101:2015

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SIST EN 62386-101:2015




IEC 62386-101

®


Edition 2.0 2014-11




INTERNATIONAL



STANDARD




NORME



INTERNATIONALE
colour

inside










Digital addressable lighting interface –

Part 101: General requirements – System components




Interface d’éclairage adressable numérique –

Partie 101: Exigences générales – Composants de système
















INTERNATIONAL

ELECTROTECHNICAL

COMMISSION


COMMISSION

ELECTROTECHNIQUE

PRICE CODE
INTERNATIONALE

CODE PRIX XC


ICS 29.140, 29.140.50 ISBN 978-2-8322-1910-2



Warning! Make sure that you obtained this publication from an authorized distributor.

Attention! Veuillez vous assurer que vous avez obtenu cette publication via un distributeur agréé.

® Registered trademark of the International Electrotechnical Commission
Marque déposée de la Commission Electrotechnique Internationale

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SIST EN 62386-101:2015
– 2 – IEC 62386-101:2014 © IEC 2014

CONTENTS
FOREWORD . 7
INTRODUCTION . 9
1 Scope . 10
2 Normative references . 10
3 Terms and definitions . 10
4 General . 15
4.1 Purpose . 15
4.2 Version number . 15
4.3 System structure and architecture . 15
4.4 System information flow . 16
4.5 Command types . 16
4.6 Bus units . 17
4.6.1 Transmitters and receivers in bus units . 17
4.6.2 Control gear . 17
4.6.3 Input device . 17
4.6.4 Single master application controller . 17
4.6.5 Multi-master application controller . 18
4.6.6 Sharing an interface . 18
4.7 Bus power supply and load calculations . 19
4.7.1 Current demand coverage . 19
4.7.2 Maximum signal current compliance . 19
4.7.3 Simplified system calculation . 19
4.8 Wiring . 19
4.8.1 Wiring structure . 19
4.8.2 Wiring specification . 19
4.9 Insulation . 20
4.10 Earthing of the bus . 20
4.11 Power interruptions at bus units . 20
4.11.1 Different levels of power interruptions . 20
4.11.2 Short power interruptions of external power supply . 20
4.11.3 External power cycle . 21
4.11.4 Short interruptions of bus power supply . 21
4.11.5 Bus power down . 21
4.11.6 System start-up timing . 21
5 Electrical specification . 23
5.1 General . 23
5.2 Marking of the interface . 23
5.3 Capacitors between the interface and earth . 23
5.4 Signal voltage rating . 23
5.5 Signal current rating. 24
5.6 Marking of bus powered bus unit . 24
5.7 Signal rise time and fall time . 24
6 Bus power supply . 26
6.1 General . 26
6.2 Marking of the bus power supply terminals . 26
6.3 Capacitors between the interface and earth . 26

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IEC 62386-101:2014 © IEC 2014 – 3 –
6.4 Voltage rating . 26
6.5 Current rating. 26
6.5.1 General current rating . 26
6.5.2 Single bus power supply current rating . 27
6.5.3 Integrated bus power supply current rating . 27
6.5.4 Dynamic behaviour of the bus power supply . 27
6.6 Bus power supply timing requirements . 28
6.6.1 Short power supply interruptions . 28
6.6.2 Short circuit behaviour . 29
7 Transmission protocol structure . 29
7.1 General . 29
7.2 Bit encoding . 29
7.2.1 Start bit and data bit encoding . 29
7.2.2 Stop condition encoding . 30
7.3 Frame description . 30
7.4 Frame types . 30
7.4.1 16 bit forward frame . 30
7.4.2 24 bit forward frame . 30
7.4.3 Reserved forward frame . 30
7.4.4 Backward frame . 30
7.4.5 Proprietary forward frames . 30
8 Timing . 31
8.1 Transmitter timing . 31
8.1.1 Transmitter bit timing . 31
8.1.2 Transmitter frame sequence timing . 32
8.2 Receiver timing . 32
8.2.1 Receiver bit timing . 32
8.2.2 Receiver bit timing violation . 34
8.2.3 Receiver frame size violation . 34
8.2.4 Receiver frame sequence timing . 34
8.2.5 Reception of backward frames . 35
8.3 Multi-master transmitter timing . 35
8.3.1 Multi-master transmitter bit timing . 35
8.3.2 Multi-master transmitter frame sequence timing . 36
9 Method of operation . 36
9.1 Collision avoidance, collision detection and collision recovery . 36
9.1.1 General . 36
9.1.2 Collision avoidance . 37
9.1.3 Collision detection . 37
9.1.4 Collision recovery . 38
9.2 Transactions . 39
9.3 Send-twice forward frames and send-twice commands . 40
9.4 Command iteration . 40
9.5 Usage of a shared interface . 41
9.5.1 General . 41
9.5.2 Backward frames . 41
9.5.3 Forward frames . 41
9.6 Use of multiple bus power supplies . 41

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9.7 Command execution . 42
10 Declaration of variables . 42
11 Definition of commands . 42
12 Test procedures . 42
12.1 General notes on test . 42
12.1.1 Abbreviations . 42
12.1.2 Ambient temperature . 42
12.1.3 External power supply voltage and frequency . 43
12.1.4 Measurement requirements . 43
12.1.5 Test signal generators and bus voltage sources . 43
12.1.6 Deviation from documentation . 43
12.1.7 Test setup . 43
12.1.8 Notation . 43
12.2 General interface tests . 49
12.2.1 Label and literature check . 49
12.2.2 Interface marking check . 49
12.2.3 Bus powered bus unit marking check . 50
12.2.4 Bus power supply marking check . 52
12.2.5 Insulation test . 54
12.2.6 Capacitor check . 55
12.3 Bus power supply tests . 55
12.3.1 Voltage rating test . 55
12.3.2 Voltage rise time test . 56
12.3.3 Current rating test . 56
12.3.4 Dynamic behaviour test . 58
12.3.5 Power-on open circuit test . 60
12.3.6 Power-on timing test . 61
12.3.7 Power supply short interruptions test . 62
12.3.8 Power supply short circuit test . 63
12.3.9 Power supply current consumption test . 64
12.4 Control device tests . 65
12.5 Control gear tests . 65
Annex A (informative) Background information for systems . 66
A.1 Wiring information . 66
A.2 System architectures . 67
A.2.1 General . 67
A.2.2 Single master architecture . 67
A.2.3 Multi-master architecture with one application controller . 68
A.2.4 Multi-master architecture with more than one application controller . 69
A.2.5 Multi-master architecture with integrated input device . 70
A.2.6 Multi-master architecture with integrated input device and power supply. 71
A.3 Collision detection . 72
A.4 Timing definition explanations . 73
A.4.1 General . 73
A.4.2 Receiver timing . 73
A.4.3 Transmitter timing . 73
A.4.4 Grey areas . 74
A.5 Maximum current consumption calculation explanation . 74

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SIST EN 62386-101:2015
IEC 62386-101:2014 © IEC 2014 – 5 –
A.5.1 Single bus power supply . 74
A.5.2 Multiple bus power supplies . 75
A.5.3 Redundant bus power supplies . 76
A.6 Communication layer overview . 77
A.6.1 General . 77
A.6.2 Physical layer . 77
A.6.3 Data link layer . 77
A.6.4 Network layer . 77
A.6.5 Transport layer . 78
A.6.6 Session layer . 78
A.6.7 Presentation layer . 78
A.6.8 Application layer . 78
Bibliography . 79

Figure 1 – IEC 62386 graphical overview . 9
Figure 2 – System structure example . 16
Figure 3 – Communication between bus units (example) . 16
Figure 4 – Example of a shared interface . 18
Figure 5 – Start up timing example . 22
Figure 6 – Maximum signal rise and fall time measurements . 25
Figure 7 – Minimum signal rise and fall time measurements . 25
Figure 8 – Bus power supply current behaviour . 28
Figure 9 – Bus power supply voltage behaviour . 28
Figure 10 – Frame example . 29
Figure 11 – Bi-phase encoded bits . 30
Figure 12 – Bit timing example . 31
Figure 13 – Settling time illustration . 32
Figure 14 – Receiver timing decision example . 34
Figure 15 – Collision detection timing decision example . 38
Figure 16 – Collision recovery example . 39
Figure 17 – Current rating test signal . 57
Figure 18 – Dynamic behaviour test setup . 58
Figure 19 – Dynamic behaviour test signal . 59
Figure A.1 – Single master architecture example . 68
Figure A.2 – Multi-master architecture example with one application controller . 69
Figure A.3 – Multi-master architecture example with two application controllers . 70
Figure A.4 – Multi-master architecture example with integrated input device . 71
Figure A.5 – Multi-master architecture example with integrate input device and bus
power supply . 72
Figure A.6 – Collision detection timing diagram. 73
Figure A.7 – Transmitter and receiver timing illustration . 74
Figure A.8 – Bus power supply current values. 75
Figure A.9 – Current demand coverage . 75
Figure A.10 – Combination of 4 bus power supplies . 76
Figure A.11 – Redundant bus power supplies . 76

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– 6 – IEC 62386-101:2014 © IEC 2014


Table 1 – System components . 15
Table 2 – Transmitters and receivers in bus units . 17
Table 3 – Power-interruption timing of external power . 20
Table 4 – Powe
...